#ifndef __PLL_H_
#define __PLL_H_

#include "../gpio.h"

#define BASE_Addr   0xC0010000

#define CLKMODEREG0 (*(volatile uint *)(BASE_Addr + 0x0000))
#define PLLSETREG0  (*(volatile uint *)(BASE_Addr + 0x0008))
#define PLLSETREG1  (*(volatile uint *)(BASE_Addr + 0x000C))
#define PLLSETREG2  (*(volatile uint *)(BASE_Addr + 0x0010))
#define PLLSETREG3  (*(volatile uint *)(BASE_Addr + 0x0014))
#define CLKDIVREG0  (*(volatile uint *)(BASE_Addr + 0x0020))
#define CLKDIVREG1  (*(volatile uint *)(BASE_Addr + 0x0024))
#define CLKDIVREG2  (*(volatile uint *)(BASE_Addr + 0x0028))
#define CLKDIVREG3  (*(volatile uint *)(BASE_Addr + 0x002C))
#define CLKDIVREG4  (*(volatile uint *)(BASE_Addr + 0x0030))
#define PWRMODE     (*(volatile uint *)(BASE_Addr + 0x0228))

#define CODA960CLKENB   (*(volatile uint *)(0xC00C7000 + 0x0000))

typedef struct{
    u8 SDIV:8;
    u32 MDIV:10;
    u8 PDIV:6;
    u8 PLLOUTDIV:4;
    u8 nPLLBYPASS:1;
    u8 PD:1;
    u8 SSCG_EN:1;
    u8 :1;
}PLLSETREG;

typedef struct{
    u16 CLKSEL_FCLKCPU0:3;
    u8 CLKDIV_FCLKCPU0:6;
    u8 CLKDIV_HCLKCPU0:6;
    u8 :1;
}CLKDIVREG0_STRUCT;

typedef struct{
    u16 CLKSEL_BCLK:3;
    u8 CLKDIV_BCLK:6;
    u8 CLKDIV_PCLK:6;
    u8 :1;
}CLKDIVREG1_STRUCT;

void chg_pll();
void print_pllsetreg(PLLSETREG *p);
void print_PLL();

#endif
